Texas-instruments TMS320C645x DSP Manuel d'utilisateur Page 119
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5.33 MAC Configuration Register (MACCONFIG)
EMAC Port Registers
The MAC configuration register (MACCONFIG) is shown in Figure 61 and described in Table 61 .
Figure 61. MAC Configuration Register (MACCONFIG)
31 24 23 16
TXCELLDEPTH RXCELLDEPTH
R-24 R-68
15 8 7 0
ADDRESSTYPE MACCFIG
R-2 R-3
LEGEND: R/W = Read/Write; R = Read only; - n = value after reset
Table 61. MAC Configuration Register (MACCONFIG) Field Descriptions
Bit Field Value Description
31-24 TXCELLDEPTH Transmit cell depth. These bit indicates the number of cells in the transmit FIFO.
23-16 RXCELLDEPTH Receive cell depth. These bits indicate the number of cells in the receive FIFO.
15-8 ADDRESSTYPE Address type
7-0 MACCFIG MAC configuration value
SPRU975B – August 2006 Ethernet Media Access Controller (EMAC)/Management Data Input/Output (MDIO) 119
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- User's Guide 1
- 2 SPRU975B – August 2006 2
- Submit Documentation Feedback 2
- Contents 3
- Read This First 10
- Data Input/Output (MDIO) 11
- 1.3 Functional Block Diagram 12
- Introduction 13
- 2.1 Clock Control 14
- 2.2 Memory Map 15
- 2.3 System Level Connections 16
- EMAC Functional Architecture 17
- 2.5 Programming Interface 26
- 2.6 EMAC Control Module 37
- 2.8 EMAC Module 43
- 2.10 Packet Receive Operation 50
- 2.13 Transfer Node Priority 56
- 2.14 Reset Considerations 56
- 2.15 Initialization 57
- 2.16 Interrupt Support 60
- 2.17 Power Management 63
- 2.18 Emulation Considerations 63
- 3.1 Introduction 64
- EMAC Control Module Registers 65
- 4 MDIO Registers 66
- 4.1 Introduction 66
- MDIO Registers 67
- 5 EMAC Port Registers 81
- 5.1 Introduction 81
- Table 30 85
- Table 33 88
- Table 38 93
- Table 39 94
- Table 43 98
- Table 44 99
- EMAC Port Registers 100
- Table 47 102
- Table 48 103
- Field Descriptions 104
- Descriptions (continued) 105
- Descriptions 110
- Table 63 121
- Table 68 126
- Table 76 134
- Table 77 135
- Appendix A Glossary 145
- Appendix A 146
- Appendix B Revision History 147
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