Texas-instruments Digital Signal Processor SM320F2812-HT Manuel d'utilisateur télécharger pdf (Page 7)

SM320F2812-HT

www.ti.com

SGUS062B– JUNE 2009– REVISED JUNE 2011

List of Tables

2-1 Hardware Features............................................................................................................... 13

2-2 Bare Die Information ............................................................................................................. 14

2-3 Signal Descriptions .............................................................................................................. 16

3-1 Addresses of Flash Sectors in F2812 ......................................................................................... 27

3-2 Wait States ........................................................................................................................ 28

3-3 Boot Mode Selection............................................................................................................. 31

3-4 Peripheral Frame 0 Registers .................................................................................................. 35

3-5 Peripheral Frame 1 Registers .................................................................................................. 35

3-6 Peripheral Frame 2 Registers .................................................................................................. 36

3-7 Device Emulation Registers..................................................................................................... 37

3-8 XINTF Configuration and Control Register Mappings ....................................................................... 39

3-9 XREVISION Register Bit Definitions ........................................................................................... 39

3-10 PIE Peripheral Interrupts ....................................................................................................... 41

3-11 PIE Configuration and Control Registers ..................................................................................... 42

3-12 External Interrupts Registers ................................................................................................... 43

3-13 PLL, Clocking, Watchdog, and Low-Power Mode Registers .............................................................. 45

3-14 PLLCR Register Bit Definitions ................................................................................................. 46

3-15 Possible PLL Configuration Modes ............................................................................................ 47

3-16 F2812 Low-Power Modes ....................................................................................................... 49

4-1 CPU-Timers 0, 1, 2 Configuration and Control Registers................................................................... 52

4-2 Module and Signal Names for EVA and EVB ................................................................................ 53

4-3 EVA Registers ................................................................................................................... 54

4-4 ADC Registers ................................................................................................................... 62

4-5 3.3-V eCAN Transceivers for the SM320F2812 DSP ....................................................................... 64

4-6 CAN Registers Map ............................................................................................................. 66

4-7 McBSP Register Summary...................................................................................................... 69

4-8 SCI-A Registers .................................................................................................................. 72

4-9 SCI-B Registers .................................................................................................................. 72

4-10 SPI Registers .................................................................................................................... 75

4-11 GPIO Mux Registers ............................................................................................................ 77

4-12 GPIO Data Registers ............................................................................................................ 78

6-1 Typical Current Consumption by Various Peripherals (at 150 MHz) ..................................................... 89

6-2 Recommended Low-Dropout Regulators ..................................................................................... 89

6-3 Clock Table and Nomenclature................................................................................................. 93

6-4 Input Clock Frequency .......................................................................................................... 93

6-5 XCLKIN Timing Requirements – PLL Bypassed or Enabled .............................................................. 94

6-6 XCLKIN Timing Requirements – PLL Disabled .............................................................................. 94

6-7 Possible PLL Configuration Modes ........................................................................................... 94

6-8 XCLKOUT Switching Characteristics (PLL Bypassed or Enabled) ....................................................... 94

6-9 Reset (XRS) Timing Requirements ........................................................................................... 95

6-10 IDLE Mode Switching Characteristics ........................................................................................ 99

6-11 STANDBY Mode Switching Characteristics ................................................................................ 100

6-12 HALT Mode Switching Characteristics ...................................................................................... 102

6-13 PWM Switching Characteristics .............................................................................................. 104

6-14 Timer and Capture Unit Timing Requirements ............................................................................. 104

6-15 External ADC Start-of-Conversion – EVA – Switching Characteristics ................................................. 105

6-16 External ADC Start-of-Conversion – EVB – Switching Characteristics ................................................. 105

1 2 3 4 5 6 7 8 9 10 11 12 ... 152 153

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