Texas Instruments TMS320C6722 Manuel d'utilisateur Page 64
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- MARQUE LIVRES
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5
UHPI_HCS
UHPI_HDSx
UHPI_HRW
UHPI_HA[15:0]
UHPI_HD[31:0]
(Read)
UHPI_HD[31:0]
(Write)
UHPI_HRDY
Valid Valid
Read data
Write data
Read Write
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6
TMS320C6727, TMS320C6726, TMS320C6722
Floating-Point Digital Signal Processors
SPRS268E – MAY 2005 – REVISED JANUARY 2007
A. Depending on the type of write or read operation (HPID or HPIC), transitions on UHPI_HRDY may or may not occur.
Figure 4-21. Non-Multiplexed Read/Write Timings
Peripheral and Electrical Specifications64 Submit Documentation Feedback
- 1.1 Features 1
- 1.2 Description 2
- 1.2.1 Device Compatibility 4
- 1.3 Functional Block Diagram 5
- Contents 6
- 2 Device Overview 7
- 2.2 Enhanced C67x+ CPU 8
- 2.3 CPU Interrupt Assignments 9
- 2.5 Program Cache 11
- 2.7 Memory Map Summary 15
- 2.8 Boot Modes 16
- 2.9 Pin Assignments 19
- 2.9.1 Pin Maps 19
- 2.9.2 Terminal Functions 21
- 2.10 Development 26
- 2.10.1 Development Support 26
- 2.10.2 Device Support 26
- 3 Device Configurations 30
- 4.1 Electrical Specifications 33
- 4.2 Absolute Maximum Ratings 33
- Tester Pin Electronics 35
- 4.7 Power Supplies 37
- 4.7.1 Power-Supply Sequencing 37
- 4.7.2 Power-Supply Decoupling 37
- 4.8 Reset 38
- 4.10 External Interrupts 44
- Table 4-4. EMIF Registers 48
- A. See Figure 4-14 65
- SPRU878) 70
- Figure 4-30 ) 76
- Table 4-27. Additional 85
- Table 4-28. Additional 85
- Table 4-29. Additional 86
- Table 4-30. Additional 87
- Table 4-31. Additional 87
- Table 4-32. Additional 88
- Figure 4-39 ) 95
- 4.18 Phase-Locked Loop (PLL) 102
- (literature number SPRU879) 104
- 5 Application Example 105
- 6 Revision History 106
- 7 Mechanical Data 107
- 7.2.1 Standoff Height 108
- 7.2.2 PowerPAD™ PCB Footprint 109
- 7.3 Packaging Information 109
- PACKAGE OPTION ADDENDUM 111
- IMPORTANT NOTICE 114
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