Texas Instruments TMS320C64X Manuel d'utilisateur

TMS320C64x+ DSPLittle-Endian DSP LibraryProgrammer’s ReferenceLiterature Number: SPRUEB8February 2006

Introduction to the TI C64x+ DSPLIB 1-21.1 Introduction to the TI C64x+ DSPLIBThe TI C64x+ DSPLIB is an optimized DSP Function Library for Cprogrammer

DSP_w_vec4-72 Weighted Vector SumDSP_w_vecFunction void DSP_w_vec(const short * restrict x, const short * restrict y, short m, short* restrict r, sh

DSP_mat_mul4-73 C64x+ DSPLIB Reference4.6 MatrixMatrix MultiplicationDSP_mat_mulFunction void DSP_mat_mul(const short * restrict x, int r1, int c1, c

DSP_mat_mul4-74 for (i = 0; i < r1; i++) for (j = 0; j < c2; j++) { sum = 0; for (k = 0; k < c1; k+

DSP_mat_trans4-75 C64x+ DSPLIB ReferenceMatrix TransposeDSP_mat_transFunction void DSP_mat_trans (const short *x, short rows, short columns, short *r

DSP_bexp4-76 4.7 MiscellaneousBlock Exponent ImplementationDSP_bexpFunction short DSP_bexp(const int *x, short nx)Arguments x[nx] Pointer to input v

DSP_bexp4-77 C64x+ DSPLIB ReferenceImplementation Notes- Bank Conflicts: No bank conflicts occur.- Interruptibility: The code is interrupt-tolerant bu

DSP_blk_eswap164-78 Endian-Swap a Block of 16-Bit ValuesDSP_blk_eswap16Function void blk_eswap16(void * restrict x, void * restrict r, int nx)Argum

DSP_blk_eswap164-79 C64x+ DSPLIB ReferenceSpecial Requirements- Input and output arrays do not overlap, except when “r == NULL” so thatthe operation o

DSP_blk_eswap324-80 Endian-Swap a Block of 32-Bit ValuesDSP_blk_eswap32Function void blk_eswap32(void * restrict x, void * restrict r, int nx)Argum

DSP_blk_eswap324-81 C64x+ DSPLIB Reference t2 = _x[i*4 + 1]; t3 = _x[i*4 + 0]; _r[i*4 + 0] = t0; _r[i*4 + 1] = t1;

Introduction to the TI C64x+ DSPLIB1-3Introduction-Filtering and convolutionJ DSP_fir_cplxJ DSP_fir_cplx_hM4X4J DSP_fir_genJ DSP_fir_gen_hM17_rA8X8J D

DSP_blk_eswap644-82 Endian-Swap a Block of 64-Bit ValuesDSP_blk_eswap64Function void blk_eswap64(void * restrict x, void * restrict r, int nx)Argum

DSP_blk_eswap644-83 C64x+ DSPLIB Reference t2 = _x[i*8 + 5]; t3 = _x[i*8 + 4]; t4 = _x[i*8 + 3]; t5 = _x[i*8 + 2];

DSP_blk_move4-84 Block Move (Overlapping)DSP_blk_moveFunction void DSP_blk_move(short * x, short * r, int nx)Arguments x [nx] Block of data to be mo

DSP_fltoq154-85 C64x+ DSPLIB ReferenceFloat to Q15 ConversionDSP_fltoq15Function void DSP_fltoq15 (float *x, short *r, short nx)Arguments x[nx] Point

DSP_fltoq154-86 Implementation Notes- Loop is unrolled twice.- Bank Conflicts: No bank conflicts occur.- Interruptibility: The code is interrupt-tole

DSP_minerror4-87 C64x+ DSPLIB ReferenceMinimum Energy Error SearchDSP_minerrorFunction int minerror (const short * restrict GSP0_TABLE, const short *

DSP_minerror4-88 Special Requirements Array GSP0_TABLE[] must be double-word aligned.Implementation Notes- Bank Conflicts: No bank conflicts occur.-

DSP_q15tofl4-89 C64x+ DSPLIB ReferenceQ15 to Float ConversionDSP_q15toflFunction void DSP_q15tofl (short *x, float *r, int nx)Arguments x[nx] Pointer

DSP_bitrev_cplx4-90 4.8 Obsolete Functions4.8.1 FFTComplex Bit-ReverseDSP_bitrev_cplxNOTE: This function is provided for backward compatibility with

DSP_bitrev_cplx4-91 C64x+ DSPLIB Referenceint nbits, nbot, ntop, ndiff, n2, halfn;short *xs = (short *) x;nbits = 0;i = nx;while (i > 1){i = i >

Features and Benefits 1-41.2 Features and Benefits- Hand-coded assembly-optimized routines- C and linear assembly source code- C-callable routines, fu

DSP_bitrev_cplx4-92 if (t){x[i3] = xj3;x[j3] = xi3;}}}Special Requirements- nx must be a power of 2.- The array index[] is generated by the routine b

DSP_radix24-93 C64x+ DSPLIB ReferenceComplex Forward FFT (radix 2)DSP_radix2NOTE: This function is provided for backward compatibility with the C62xDS

DSP_radix24-94 xt = x[2*l] − x[2*i];x[2*i] = x[2*i] + x[2*l];yt = x[2*l+1] − x[2*i+1];x[2*i+1] = x[2*i+1] + x[2*l+1];x[2*l] = (c*xt + s*yt)>>15

DSP_r4fft4-95 C64x+ DSPLIB ReferenceComplex Forward FFT (radix 4)DSP_r4fftNOTE: This function is provided for backward compatibility with the C62xDSPL

DSP_r4fft4-96 si1 = w[ia1 * 2];co2 = w[ia2 * 2 + 1];si2 = w[ia2 * 2];co3 = w[ia3 * 2 + 1];si3 = w[ia3 * 2];ia1 = ia1 + ie;for (i0 = j; i0 < nx; i0

DSP_r4fft4-97 C64x+ DSPLIB Reference>>15;x[2 * i3 + 1] = (s2 * co3−r2 *si3)>>15;}}ie <<= 2;}}Special Requirements- 4 ≤ nx ≤ 65536 (

DSP_fft4-98 Complex Forward FFT With Digital ReversalDSP_fftFunction void DSP_fft (const short * restrict w, int nx, short * restrict x, short * res

DSP_fft4-99 C64x+ DSPLIB Reference#include <stdio.h>#include <stdlib.h>#if 0# define DIG_REV(i, m, j) ((j) = (_shfl(_rotl(_bitr(_deal(i)),

DSP_fft4-100 _nassert((int)x % 8 == 0); _nassert((int)y % 8 == 0); _nassert((int)w % 8 == 0); _nassert(n >= 16); _nassert(n <

DSP_fft4-101 C64x+ DSPLIB Reference { #ifndef NOASSUME _nassert(i % 4 == 0); _nassert(s >= 4);

2-1Installing and Using DSPLIBThis chapter provides information on how to install and rebuild the TI C64x+DSPLIB.Topic Page2.1 How to Install DSPLIB 2

DSP_fft4-102 /* the stride between the elements as follows: */ /* x(n), x(n + s), x(n + 2*s), x(n +

DSP_fft4-103 C64x+ DSPLIB Reference xl1 = x0i − x2i; xl20 = x1r − x3r; xl21 = x1i

DSP_fft4-104 /* −−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−− */ /* Offset to next subtable of twiddle factors. W

DSP_fft4-105 C64x+ DSPLIB Reference x0r = x[2*(i + 0) + 0]; x0i = x[2*(i + 0) + 1]; x1r = x[2*(i + 1) + 0]; x1i = x[2*(i + 1) +

DSP_fft4-106 Special Requirements- In-place computation is not allowed.- nx must be a power of 4 and 4 ≤ nx ≤ 65536.- Input x[ ] and output y[ ] are

DSP_fft16x16t4-107 C64x+ DSPLIB ReferenceComplex Forward Mixed Radix 16- x 16-Bit FFT With TruncationDSP_fft16x16tFunction void DSP_fft16x16t(const s

DSP_fft16x16t4-108 # define DIG_REV(i, m, j) ((j) = (_shfl(_rotl(_bitr(_deal(i)), 16)) >> (m)))#else# define DIG_REV(i, m, j)

DSP_fft16x16t4-109 C64x+ DSPLIB Reference /*−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−*/ /* Determine the magnitude o

DSP_fft16x16t4-110 /*−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−*/ /* Set up offsets to access ”N/4”, ”N/2”, ”3N

DSP_fft16x16t4-111 C64x+ DSPLIB Reference /*−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−*/ co10 = w[j+1]; si1

How to Install DSPLIB 2-22.1 How to Install DSPLIBNote:You should read the README.txt file for specific details of the release.The DSPLIB is provided

DSP_fft16x16t4-112 xl0_1 = x_2 − x_l1_2; xl1_1 = x_3 − x_l1_3; xh20_0 = x_h2_0 + x_l2_0; xh21_0 = x_h2_1 + x_l

DSP_fft16x16t4-113 C64x+ DSPLIB Reference /* y0i = x0i + x2i + x1i + x3i = xh1 + xh21 */ /* y1r = x0r − x2r + (x

DSP_fft16x16t4-114 x2[h2+1] = (co10 * yt1_0 − si10 * xt1_0) >> 15; x2[h2+2] = (si11 * yt1_1 + co11 * xt1_1) >> 15;

DSP_fft16x16t4-115 C64x+ DSPLIB Reference } else { y1 = y0 + (int) (npoints >> 1); y3 = y2 + (int) (npoints >> 1);

DSP_fft16x16t4-116 xl0_1 = x_2 − x_6; xl1_1 = x_3 − x_7; n00 = xh0_0 + xh0_1; n01 = xh1_0 + xh1_1; n10 = xl0_0 + xl1_1; n

DSP_fft16x16t4-117 C64x+ DSPLIB Reference if (radix == 2) { n02 = x_8 + x_a; n03 = x_9 + x_b; n22 = x_8 − x_a;

DSP_fft16x16t4-118 Special Requirements- In-place computation is not allowed.- The size of the FFT, nx, must be power of 2 or 4, and 16 ≤ nx ≤ 32768.

DSP_fft16x16t4-119 C64x+ DSPLIB ReferenceThe following statements can be made based on above observations:1) Inner loop “i0” iterates a variable numbe

DSP_fft16x16t4-120 There is one slight break in the flow of packed processing. The real part of thecomplex number is in the lower half, and the imagi

A-1Appendix APerformance/Fractional Q FormatsThis appendix describes performance considerations related to the C64x+DSPLIB and provides information ab

Using DSPLIB2-3Installing and Using DSPLIB2.2 Using DSPLIB2.2.1 DSPLIB Arguments and Data Types2.2.1.1 DSPLIB TypesTable 2−1 shows the data types hand

Performance Considerations A-2A.1 Performance ConsiderationsThe ceil( ) is used in some benchmark formulas to accurately describe thenumber of cycles.

Fractional Q FormatsA-3Performance/Fractional Q FormatsA.2 Fractional Q FormatsUnless specifically noted, DSPLIB functions use Q15 format, or to be mo

Fractional Q Formats A-4A.2.3 Q.31 FormatQ.31 format spans two 16-bit memory words. The 16-bit word stored in thelower memory location contains the 16

B-1Appendix ASoftware Updates and Customer SupportThis appendix provides information about software updates and customersupport.Topic PageB.1 DSPLIB S

DSPLIB Software Updates B-2B.1 DSPLIB Software UpdatesC64x DSPLIB software updates may be periodically released incorporatingproduct enhancements and

C-1Appendix AGlossaryAaddress: The location of program code or data stored; an individuallyaccessible memory location. A-law companding: See compress

Glossary C-2board support library (BSL): The BSL is a set of application programminginterfaces (APIs) consisting of target side DSP code used to confi

GlossaryC-3Glossarycompress and expand (compand): A quantization scheme for audiosignals in which the input signal is compressed and then, afterproces

Glossary C-4DSP_blk_move: Block move. DSP_dotp_sqr: Vector dot product and square. DSP_dotprod: Vector dot product. DSP_fft: Complex forward FFT with

GlossaryC-5GlossaryDSP_minval: Minimum value of a vector. DSP_mul32: 32-bit vector multiply. DSP_neg32: 32-bit vector negate. DSP_q15tofl: Q15 to floa

Using DSPLIB 2-42.2.2 Calling a DSPLIB Function From CIn addition to correctly installing the DSPLIB software, follow these steps toinclude a DSPLIB f

Glossary C-6HHAL: Hardware abstraction layer of the CSL. The HAL underlies the servicelayer and provides it a set of macros and constants for manipula

GlossaryC-7Glossaryinterrupt service table (IST) A table containing a corresponding entry foreach of the 16 physical interrupts. Each entry is a singl

Glossary C-8Nnonmaskable interrupt (NMI): An interrupt that can be neither masked nordisabled. Oobject file: A file that has been assembled or linked

GlossaryC-9Glossaryreset: A means of bringing the CPU to a known state by setting the registersand control bits to predetermined values and signaling

C-10

Index-1IndexAadaptive filtering functions 3-4DSPLIB reference 4-2address, defined C-1A-law companding, defined C-1API, defined C-1application programm

IndexIndex-2 DSP_dotproddefined C-4DSPLIB reference 4-60DSP_fftdefined C-4DSPLIB reference 4-98DSP_fft16x16rdefined C-4DSPLIB reference 4-14DSP_fft16

Index-3DSP_w_vecdefined C-5DSPLIB reference 4-72DSPLIBargument conventions, table 3-2arguments 2-3arguments and data types 2-3calling a function from

IndexIndex-4 Ffetch packet, defined C-5FFT (fast Fourier transform)defined C-5functions 3-4FFT (fast Fourier transform) functions, DSPLIB reference 4

Index-5QQ.3.12 bit fields A-3Q.3.12 format A-3Q.3.15 bit fields A-3Q.3.15 format A-3Q.31 format A-4Q.31 high-memory location bit fields A-4Q.31 low-me

How to Rebuild DSPLIB2-5Installing and Using DSPLIB2.2.6 Interrupt Behavior of DSPLIB FunctionsAll of the functions in this library are designed to be

2-6

3-1DSPLIB Function TablesThis chapter provides tables containing all DSPLIB functions, a briefdescription of each, and a page reference for more detai

IMPORTANT NOTICETexas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections,modifications, enhancements, improvemen

Arguments and Conventions Used 3-23.1 Arguments and Conventions UsedThe following convention has been used when describing the arguments foreach indiv

DSPLIB Functions3-3DSPLIB Function Tables3.2 DSPLIB FunctionsThe routines included in the DSP library are organized into eight functionalcategories an

DSPLIB Function Tables 3-43.3 DSPLIB Function TablesTable 3−2. Adaptive FilteringFunctions Description Pagelong DSP_firlms2(short *h, short *x, short

DSPLIB Function Tables3-5DSPLIB Function TablesTable 3−4. FFT (Continued)Functions PageDescriptionvoid DSP_ifft16x16(short *w, int nx, short *x, short

DSPLIB Function Tables 3-6Table 3−5. Filtering and Convolution (Continued)Functions PageDescriptionvoid DSP_iir(short *r1, short *x, short *r2, short

DSPLIB Function Tables3-7DSPLIB Function TablesTable 3−8. MiscellaneousFunctions Description Pageshort DSP_bexp(int *x, short nx) Max Exponent of a Ve

Differences Between the C64x and C64x+ DSPLIBs 3-83.4 Differences Between the C64x and C64x+ DSPLIBsThe C64x+ DSPLIB was developed by optimizing some

Differences Between the C64x and C64x+ DSPLIBs3-9DSPLIB Function TablesTable 3−10. Functions Optimized in the C64x+ DSPLIB (Continued)Function Optimiz

Differences Between the C64x and C64x+ DSPLIBs 3-10Table 3−10. Functions Optimized in the C64x+ DSPLIB (Continued)Function Optimization TypeC64x+ Opti

4-1DSPLIB ReferenceThis chapter provides a list of the functions within the DSP library (DSPLIB)organized into functional categories. The functions wi

iRead This FirstPrefaceRead This FirstAbout This ManualThis document describes the C64x+ digital signal processor little-endian(DSP) Library, or DSPLI

DSP_firlms24-2 4.1 Adaptive FilteringLMS FIRDSP_firlms2Function long DSP_firlms2(short * restrict h, const short * restrict x, short b, int nh) Argu

DSP_firlms24-3 C64x+ DSPLIB ReferenceImplementation Notes- Bank Conflicts: No bank conflicts occur.- Interruptibility: The code is interrupt-tolerant

DSP_autocor4-4 4.2 CorrelationAutoCorrelationDSP_autocorFunction void DSP_autocor(short * restrict r, const short * restrict x, int nx, int nr) Argu

DSP_autocor4-5 C64x+ DSPLIB ReferenceImplementation Notes- Bank Conflicts: No bank conflicts occur.- Interruptibility: The code is interrupt-tolerant

DSP_autocor_rA84-6 AutoCorrelationDSP_autocor_rA8Function void DSP_autocor_rA8(short * restrict r, const short * restrict x, int nx, int nr)Argument

DSP_autocor_rA84-7 C64x+ DSPLIB ReferenceBenchmarks Cycles nx<40: 6*nr+ 20 nx>=40: nx*nr/8 + 2*nr + 20Codesize 30

DSP_fft16x164-8 4.3 FFTComplex Forward Mixed Radix 16 x 16-bit FFTDSP_fft16x16Function void DSP_fft16x16(const short * restrict w, int nx, short * r

DSP_fft16x164-9 C64x+ DSPLIB ReferenceImplementation Notes- Bank Conflicts: No bank conflicts occur.- Interruptibility: The code is interruptible.The

DSP_fft16x164-10 To vectorize the FFT, it is desirable to access the twiddle factor array usingdouble word wide loads and fetch the twiddle factors n

DSP_fft16x16_imre4-11 C64x+ DSPLIB ReferenceComplex Forward Mixed Radix 16 x 16-bit FFT, With Im/Re OrderDSP_fft16x16_imreFunction void DSP_fft16x16_

Trademarksii SPRAA84 — TMS320C64x to TMS320C64+ CPU Migration Guide.Describes migrating from the Texas Instruments TMS320C64x digitalsignal processor

DSP_fft16x16_imre4-12 The routine uses log4(nx) − 1 stages of radix-4 transform and performs eithera radix-2 or radix-4 transform on the last stage d

DSP_fft16x16_imre4-13 C64x+ DSPLIB ReferenceTo vectorize the FFT, it is desirable to access twiddle factor array using doubleword wide loads and fetch

DSP_fft16x16r4-14 Complex Forward Mixed Radix 16 x 16-bit FFT With RoundingDSP_fft16x16rFunction void DSP_fft16x16r(int nx, short * restrict x, cons

DSP_fft16x16r4-15 C64x+ DSPLIB Reference void dft(int n, short x[], short y[]) { int k,i, index; const double PI = 3

DSP_fft16x16r4-16 The function takes the twiddle factors and input data, and calculates the FFTproducing the frequency domain data in the y[ ] array.

DSP_fft16x16r4-17 C64x+ DSPLIB ReferenceDSP_fft16x16r(N, &x[0], &w[0], brev,y,N/4,0, N)DSP_fft16x16r(N/4,&x[0], &w[

DSP_fft16x16r4-18 { int i, l0, l1, l2, h2, predj; int l1p1,l2p1,h2p1, tw_offset, stride, fft_jmp; short xt0, yt0, xt1, yt1, xt2, yt2;

DSP_fft16x16r4-19 C64x+ DSPLIB Reference x_1 = x[1]; x_h2 = x[h2]; x_h2p1 = x[h2+1]; x_l1 = x[l1];

DSP_fft16x16r4-20 ptr_x2[h2p1] = (yt0 * co2 − xt0 * si2 + 0x00008000) >> 16; ptr_x2[l2 ] = (xt2 * co3 + yt2 * si3 + 0x0

DSP_fft16x16r4-21 C64x+ DSPLIB Reference k = (k0 << 6) | k1; if (l0 < 0) k = k << −l0;

ContentsiiiContents1 Introduction 1-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

DSP_fft16x16r4-22 xl1_1 = x6; xl0_1 = x7; } yt2 = xl0_0 + xl1_1; yt3

DSP_fft16x16r4-23 C64x+ DSPLIB ReferenceImplementation Notes- Bank Conflicts: No bank conflicts occur.- Interruptibility: The code is interruptible.-

DSP_fft16x324-24 Complex Forward Mixed Radix 16 x 32-bit FFT With RoundingDSP_fft16x32Function void DSP_fft16x32(const short * restrict w, int nx, i

DSP_fft16x324-25 C64x+ DSPLIB ReferenceImplementation Notes- Bank Conflicts: No bank conflicts occur.- Interruptibility: The code is interruptible.- T

DSP_fft32x324-26 Complex Forward Mixed Radix 32 x 32-bit FFT With RoundingDSP_fft32x32Function void DSP_fft32x32(const int * restrict w, int nx, int

DSP_fft32x324-27 C64x+ DSPLIB ReferenceImplementation Notes- Bank Conflicts: No bank conflicts occur.- Interruptibility: The code is interruptible.- T

DSP_fft32x32s4-28 Complex Forward Mixed Radix 32 x 32-bit FFT With ScalingDSP_fft32x32sFunction void DSP_fft32x32s(const int * restrict w, int nx, i

DSP_fft32x32s4-29 C64x+ DSPLIB Reference-The FFT coefficients (twiddle factors) are generated using the programtw_fft32x32 provided in the directory ‘

DSP_ifft16x164-30 Complex Inverse Mixed Radix 16 x 16-bit FFT With RoundingDSP_ifft16x16Function void DSP_ifft16x16(const short * restrict w, int nx

DSP_ifft16x164-31 C64x+ DSPLIB ReferenceImplementation Notes- Bank Conflicts: No bank conflicts occur.- Interruptibility: The code is interruptible.-

Contentsiv A Performance/Fractional Q Formats A-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Descri

DSP_ifft16x16_imre4-32 Complex Inverse Mixed Radix 16 x 16-bit FFT With Im/Re OrderDSP_ifft16x16_imreFunction void DSP_ifft16x16_imre(const short *

DSP_ifft16x16_imre4-33 C64x+ DSPLIB ReferenceImplementation Notes- Bank Conflicts: No bank conflicts occur.- Interruptibility: The code is interrupti

DSP_ifft16x324-34 Complex Inverse Mixed Radix 16 x 32-bit FFT With RoundingDSP_ifft16x32Function void DSP_ifft16x32(const short * restrict w, int nx

DSP_ifft16x324-35 C64x+ DSPLIB Reference-The FFT coefficients (twiddle factors) are generated using the programtw_fft16x32 provided in the directory ‘

DSP_ifft32x324-36 Complex Inverse Mixed Radix 32 x 32-bit FFT With RoundingDSP_ifft32x32Function void DSP_ifft32x32(const int * restrict w, int nx,

DSP_ifft32x324-37 C64x+ DSPLIB Reference-The FFT coefficients (twiddle factors) are generated using the programtw_fft32x32 provided in the directory ‘

DSP_fir_cplx4-38 4.4 Filtering and ConvolutionComplex FIR FilterDSP_fir_cplxFunction void DSP_fir_cplx (const short * restrict x, const short * rest

DSP_fir_cplx4-39 C64x+ DSPLIB ReferenceSpecial Requirements- The number of coefficients nh must be a multiple of 2.- The number of output samples nr m

DSP_fir_cplx_hM4X44-40 Complex FIR FilterDSP_fir_cplx_hM4X4Function void DSP_fir_cplx _hM4X4(const short * restrict x, const short * restrict h, sho

DSP_fir_cplx_hM4X44-41 C64x+ DSPLIB ReferenceSpecial Requirements- The number of coefficients nh must be larger or equal to 4 and a multipleof 4.- The

TablesvContentsTables2−1 DSPLIB Data Types 2-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

DSP_fir_gen4-42 FIR FilterDSP_fir_genFunction void DSP_fir_gen (const short * restrict x, const short * restrict h, short * restrictr, int nh, int n

DSP_fir_gen4-43 C64x+ DSPLIB ReferenceSpecial Requirements- The number of coefficients, nh, must be greater than or equal to 5.Coefficients must be in

DSP_fir_gen_hM17_rA8X84-44 FIR FilterDSP_fir_gen_hM17_rA8X8Function void DSP_fir_gen_hM17_rA8X8 (const short * restrict x, const short * restricth,

DSP_fir_gen_hM17_rA8X84-45 C64x+ DSPLIB ReferenceSpecial Requirements- The number of coefficients, nh, must be greater than or equal to 17.Coefficient

DSP_fir_r44-46 FIR Filter (when the number of coefficients is a multiple of 4)DSP_fir_r4Function void DSP_fir_r4 (const short * restrict x, const s

DSP_fir_r44-47 C64x+ DSPLIB ReferenceSpecial Requirements- The number of coefficients, nh, must be a multiple of 4 and greater thanor equal to 8. Coef

DSP_fir_r84-48 FIR Filter (when the number of coefficients is a multiple of 8)DSP_fir_r8Function void DSP_fir_r8_hM16_rM8A8X8 (short *x, short *h, s

DSP_fir_r84-49 C64x+ DSPLIB ReferenceImplementation Notes- Bank Conflicts: No bank conflicts occur.- Interruptibility: The code is interruptible.- The

DSP_fir_r8_hM16_rM8A8X84-50 FIR Filter (the number of coefficients is a multiple of 8)DSP_fir_r8_hM16_rM8A8X8Function void DSP_fir_r8_hM16_rM8A8X8 (

DSP_fir_r8_hM16_rM8A8X84-51 C64x+ DSPLIB ReferenceSpecial Requirements- The number of coefficients, nh, must be a multiple of 8 and greater thanor equ

vi

DSP_fir_sym4-52 Symmetric FIR FilterDSP_fir_symFunction void DSP_fir_sym (const short * restrict x, const short * restrict h, short * re-strict r,

DSP_fir_sym4-53 C64x+ DSPLIB Referencey0 += (short) (x[j + i] + x[j + 2 * nh − i]) * h[i];y0 += x[j + nh] * h[nh];r[j] = (int) (y0 >> s);}}Speci

DSP_iir4-54 IIR With 5 CoefficientsDSP_iirFunction void DSP_iir (short * restrict r1, const short * restrict x, short * restrict r2, constshort * re

DSP_iir4-55 C64x+ DSPLIB ReferenceSpecial Requirements- nr is greater than or equal to 8.- Input data array x[ ] contains nr + 4 input samples to prod

DSP_iirlat4-56 All-Pole IIR Lattice Filter DSP_iirlatFunction void DSP_iirlat(const short * restrict x, int nx, const short * restrict k, int nk, in

DSP_iirlat4-57 C64x+ DSPLIB Reference rt = rt − (short)(b[i] >> 15) * k[i]; b[i + 1] = b[i] + (short)(rt >>

DSP_dotp_sqr4-58 4.5 MathVector Dot Product and SquareDSP_dotp_sqrFunction int DSP_dotp_sqr(int G, const short * restrict x, const short * restrict

DSP_dotp_sqr4-59 C64x+ DSPLIB ReferenceSpecial Requirements nx must be a multiple of 4 and greater than or equal to 12.Implementation Notes- Bank Conf

DSP_dotprod4-60 Vector Dot ProductDSP_dotprodFunction int DSP_dotprod(const short * restrict x, const short * restrict y, int nx)Arguments x[nx] Fir

DSP_dotprod4-61 C64x+ DSPLIB ReferenceImplementation Notes- Bank Conflicts: No bank conflicts occur if the input arrays x[ ] and y[ ] areoffset by 4 h

1-1IntroductionThis chapter provides a brief introduction to the TI C64x+ DSP Libraries(DSPLIB), shows the organization of the routines contained in t

DSP_maxval4-62 Maximum Value of VectorDSP_maxvalFunction short DSP_maxval (const short *x, int nx)Arguments x[nx] Pointer to input vector of size nx

DSP_maxidx4-63 C64x+ DSPLIB ReferenceIndex of Maximum Element of VectorDSP_maxidxFunction int DSP_maxidx (const short *x, int nx)Arguments x[nx] Poin

DSP_maxidx4-64 Implementation Notes- Bank Conflicts: No bank conflicts occur.- Interruptibility: The code is interrupt-tolerant but not interruptible

DSP_minval4-65 C64x+ DSPLIB ReferenceMinimum Value of VectorDSP_minvalFunction short DSP_minval (const short *x, int nx)Arguments x [nx] Pointer to i

DSP_mul324-66 32-Bit Vector MultiplyDSP_mul32Function void DSP_mul32(const int * restrict x, const int * restrict y, int * restrict r, shortnx)Argum

DSP_mul324-67 C64x+ DSPLIB Referencee+=d; /* Xhigh*Yhigh + */ /* (Xhigh*Ylow+Xlow*Yhigh)>>16 */*(r++)=e;}}Special Requirements- nx must be a

DSP_neg324-68 32-Bit Vector NegateDSP_neg32Function void DSP_neg32(int *x, int *r, short nx) Arguments x[nx] Pointer to input data vector 1 of size

DSP_recip164-69 C64x+ DSPLIB Reference16-Bit ReciprocalDSP_recip16Function void DSP_recip16 (short *x, short *rfrac, short *rexp, short nx)Arguments

DSP_recip164-70 *(rexp++)=normal−15; /* store exponent */b=0x80000000; /* dividend = 1 */for(j=15;j>0;j−−)b=_subc(b,a); /* divide */b=b&0x7FFF

DSP_vecsumsq4-71 C64x+ DSPLIB ReferenceSum of SquaresDSP_vecsumsqFunction int DSP_vecsumsq (const short *x, int nx)Arguments x[nx] Input vectornx Num