Texas Instruments TMS320C64X Manuel d'utilisateur télécharger pdf (Page 81)

DSP_fir_sym

4-53 C64x+ DSPLIB Reference

y0 += (short) (x[j + i] + x[j + 2 * nh − i]) * h[i];

y0 += x[j + nh] * h[nh];

r[j] = (int) (y0 >> s);

}

Special Requirements

- nh must be a multiple of 8. The number of original symmetric coefficients

is 2*nh+1. Only half (nh+1) are required.

- nr must be a multiple of 4.

- x[ ] and h[ ] must be double-word aligned.

- r[ ] must be word aligned.

Implementation Notes

- Bank Conflicts: No bank conflicts occur.

- Interruptibility: The code is interruptible.

- The load double-word instruction is used to simultaneously load four

values in a single clock cycle.

- The inner loop is unrolled eight times.

Benchmarks Cycles (10 * nh/8 + 15) * nr/4 + 26

Codesize 664 bytes

1 2 ... 76 77 78 79 80 81 82 83 84 85 86 ... 168 169

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Texas Instruments TMS320C64X Manuel d'utilisateur Page 81