Texas Instruments DAC3482 Manuel d'utilisateur

User's GuideSLAU336–March 2011DAC3484/DAC3482 EVMContents1 Introduction ...

Basic Test Procedurewww.ti.comFigure 8. TSW3100 CommsSignalPattern (WCDMA) Programming GUI3.4 DAC348x Software Quick Start Guide• Provide the clock in

www.ti.comBasic Test Procedure(Baseband = 30MHz, NCO = 30MHz with NCO Gain disabled, QMC Gain = 1446, LO = 1900MHz)Figure 9. DAC3484 + TRF3703-15 WCDM

Optional Configurationwww.ti.com(Baseband = 30MHz, NCO disabled, QMC Gain = 1024, LO = 1930MHz)Figure 10. DAC3484 + TRF3703-15 WCDMA Output4 Optional

www.ti.comOptional ConfigurationFigure 11. Locations of DAC348x to Transformer Output Jumper Locations• Provide the clock input 1228.8 MHz at 1.5Vrms

Optional Configurationwww.ti.com(baseband = 30MHz, NCO = 30MHz with NCO Gain disabled, QMC Gain = 1446)Figure 12. DAC3484 Transformer Coupled Output a

www.ti.comOptional Configuration(baseband = 30MHz, NCO disabled, QMC Gain = 1024)Figure 13. DAC3484 Transformer Coupled Output at 30MHz IF4.2 Using th

Optional Configurationwww.ti.comFigure 14. Locations of the DAC3482 to TRF3703-15 Interface JumpersThe pattern generation is different for DAC3484 EVM

www.ti.comOptional ConfigurationFigure 15. TSW3100 GUI Configuration for Generating a WCDMA Signal for DAC348217SLAU336–March 2011 DAC3484/DAC3482 EVM

Evaluation Board/Kit Important NoticeTexas Instruments (TI) provides the enclosed product(s) under the following conditions:This evaluation board/kit

IMPORTANT NOTICETexas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improveme

19.2MHzTCXOCDCE62005DAC348XDATADATA _CLKFRAMESYNCPARITY(LVDS DC Coupled)DAC_CLK(LVPECL ACCoupled)OSTR_CLK(LVPECL ACCoupled)J20 RFJ19 LOFPGA CLKTSW3100

www.ti.comSoftware Control2 Software Control2.1 Installation Instructions• Open the folder named DAC348x_Installer_vxpx (xpx represents the latest ver

Software Controlwww.ti.com• FIFO: allows the configuration of the FIFO and FIFO sync sources.• LVDS delay: provides internal delay of either the LVDS

www.ti.comSoftware Control2.2.2 Digital Block OptionsFigure 4. Digital Block Options● Interpolation: allows control of the data rate versus DAC sampli

Software Controlwww.ti.com● NCO: allows fine mixing of the I/Q signal. The procedure to adjust the NCO mixing frequency arelisted below:1. Enter the D

www.ti.comSoftware Control2.2.4 CDCE62005Figure 6. CDCE62005 Tab Configured for 4x InterpolationClock frequency control is determined by register valu

PC+5V+6 VEthernetUSBJ13J9DAC348XJ14J18TSW3100PatternGeneratorJ74J13Cross-overEthernet CableUSB Mini-BCableRFLOSpectrumAnalyzerSignalGenerator(LO Sourc

www.ti.comBasic Test Procedure3.2 Test Set-Up Connection● TSW3100 Pattern Generator1. Connect 5V power supply to J9, 5V_IN jack of the TSW3100 EVM.2.