Texas-instruments MSP50C6xx Manuel d'utilisateur Page 195
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- Table des matières
- MARQUE LIVRES
Noté. / 5. Basé sur avis des utilisateurs
Individual Instruction Descriptions
4-109Assembly Language Instructions
4.14.25 IRET Return From Interrupt
Syntax
[label] name Clock, clk Word, w With RPT, clk Class
IRET 2 1 N/R 5
Execution PC ⇐ TOS
R7 ⇐ R7 – 2
TOS ⇐ *R7
Flags Affected None
Opcode
Instructions 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
IRET 1 1 0 1 1 1 1 0 1 0 1 1 1 1 1 1 0
See Also RET, CALL, Ccc, INTE, INTD
Description Return from interrupt. Pop top of stack to program counter.
Example 4.1 IRET
Return from interrupt service routine. If used in a called subroutine, return from subroutine.
- User’s Guide 1
- Read This First 3
- Notational Conventions 4
- Trademarks 5
- Contents 10
- Introduction to the MSP50C6xx 15
- 1.1 Features of the MSP50C6xx 16
- 1.2 Applications 17
- Development Device: MSP50P614 18
- Figure 1–3. RESET Circuit 22
- MSP50C6xx Architecture 25
- 2.1 Architecture Overview 26
- 2-3MSP50C6xx Architecture 27
- 2.2 Computation Unit 29
- Computation Unit 30
- 2.2.2 Arithmetic Logic Unit 31
- 2-9MSP50C6xx Architecture 33
- 2.3 Data Memory Address Unit 35
- 2.3.1 RAM Configuration 36
- Data Memory Address Unit 37
- 2-13MSP50C6xx Architecture 37
- 2.4 Program Counter Unit 38
- 2.5 Bit Logic Unit 38
- 2.6.1 Memory Map 39
- 2-17MSP50C6xx Architecture 41
- 2.6.3 Interrupt Vectors 42
- 2.6.4 ROM Code Security 43
- 2.7 Interrupt Logic 46
- Interrupt Logic 48
- 2-25MSP50C6xx Architecture 49
- 2.8 Clock Control 50
- Figure 2–9. PLL Performance 51
- Clock Control 52
- 2.9 Timer Registers 55
- Timer Registers 56
- 2.10 Reduced Power Modes 57
- Reduced Power Modes 58
- Table 2–4) 62
- 2.11 Execution Timing 64
- Peripheral Functions 65
- 3.1.2 Dedicated Input Port F 68
- 3.1.3 Dedicated Output Port G 69
- 3.1.4 Branch on D Port 70
- Table 3–1. Interrupts 72
- 3.2.3 PDM Clock Divider 75
- Figure 3–1. PDM Clock Divider 75
- 3-13Peripheral Functions 77
- 3.3 Comparator 79
- 3-19Peripheral Functions 83
- 3-21Peripheral Functions 85
- Chapter 4 87
- 4.1 Introduction 88
- 4.2 System Registers 88
- 4.2.5 Top of Stack, (TOS) 89
- 4.2.8 Accumulators (AC0–AC31) 90
- System Registers 91
- Bit Bits 16 – 5 4 3 2 1 0 91
- AP0–AP3 Not used Points to An 91
- 4.2.11 String Register (STR) 92
- 4.2.12 Status Register (STAT) 92
- 4.3.2 Addressing Modes 95
- Table 4–3. Rx Bit Description 96
- 4.3.3 Immediate Addressing 99
- 4.3.4 Direct Addressing 100
- 4.3.5 Indirect Addressing 101
- 4.3.6 Relative Addressing 102
- 4.3.7 Flag Addressing 105
- 4.3.8 Tag/Flag Bits 106
- Table 4–11 109
- Instruction Classification 111
- Class 1b 0 1 C1b s An adrs 112
- Hardware Loop Instructions 139
- 4.8 String Instructions 141
- String Instructions 142
- 4.9 Lookup Instructions 143
- Interrupt 144
- FIRK_COEFFS 152
- N+1 Taps 153
- 4.12 Conditionals 155
- 4.13 Legend 156
- 4.14.1 ADD Add word 161
- 4.14.2 ADDB ADD BYTE 163
- 4.14.3 ADDS Add String 164
- 4.14.4 AND Bitwise AND 166
- 4.14.5 ANDB Bitwise AND Byte 168
- 4.14.7 BEGLOOP Begin Loop 170
- Table 4–48. Names for cc 174
- 4.14.10 CMP Compare Two Words 177
- Example 4.14.10.4 CMP R0, R5 178
- CMPB An, imm8 1 1 N/R 2a 179
- CMPB Rx, imm8 1 1 N/R 4b 179
- 4.14.15 ENDLOOP End Loop 183
- EXTSGN An[~] [, next A] 1 1 n 184
- MOV AP0, 0 185
- See Also EXTSGN 186
- Example 4.14.17.1 EXTSGNS A0~ 186
- See Also RPT, FIRK, COR, CORK 188
- Example 4.14.18.1 RPT 0 188
- FIR A0, *R0 188
- 4.14.20 IDLE Halt Processor 190
- INTD 1 1 N/R 9d 193
- 4.14.24 INTE Interrupt Enable 194
- IRET 2 1 N/R 5 195
- 4.14.26 Jcc Conditional Jumps 196
- Syntax Description 205
- MOVAPH An, MR, {adrs} 207
- 0 1 1 0 1 0 0 An adrs 207
- MOVAPHS An, MR, {adrs} 208
- 0 1 1 0 1 0 1 An adrs 208
- MOVSPH An, MR, {adrs} 214
- 0 1 1 0 0 1 0 An adrs 214
- MOVSPHS An, MR, {adrs} 215
- 0 1 1 0 0 1 1 An adrs 215
- MOVT {adrs}, TFn 216
- 1 1 0 1 0 1 1 1 fig adrs 216
- NOTE: B = Byte move possible 218
- S = String move possible 218
- MULR [adrs] 220
- 1 1 0 1 1 1 0 1 0 adrs 220
- 4.14.49 NOP No Operation 230
- 4.14.52 OR Bitwise Logical OR 233
- 4.14.53 ORB Bitwise OR Byte 235
- 4.14.54 ORS Bitwise OR String 236
- 4.14.55 OUT Output to Port 237
- RET 1 1 N/R 5 239
- RFLAG {flagadrs} 1 1 N/R 8a 240
- RFM 1 1 N/R 9d 241
- ROVM 1 1 N/R 9d 242
- 4.14.62 RTAG Reset Tag 244
- RXM 1 1 N/R 9d 245
- 4.14.64 SFLAG Set Memory Flag 246
- SFM 1 1 N/R 9d 247
- 4.14.66 SHL Shift Left 248
- SOVM 1 1 N/R 9d 260
- 4.14.79 STAG Set Tag 261
- 4.14.80 SUB Subtract 262
- 4.14.81 SUBB Subtract Byte 264
- SXM 1 1 N/R 9d 267
- 4.14.84 VCALL Vectored Call 268
- 4.14.85 XOR Logical XOR 269
- 4.14.86 XORB Logical XOR Byte 271
- 4.14.88 ZAC Zero Accumulator 273
- 4.15 Instruction Set Encoding 275
- Instruction Set Encoding 276
- 4.16 Instruction Set Summary 284
- Instruction Set Summay 292
- Code Development Tools 297
- 5.1 Introduction 298
- Introduction 299
- 5-3Code Development Tools 299
- 5.2.2 Tools Definitions 301
- 5-7Code Development Tools 303
- 5.2.3 Documentation 304
- 5.3.1 System Requirements 304
- 5.3.2 Hardware Tools Setup 305
- 5.4 Assembler 307
- Assembler 308
- 5-13Code Development Tools 309
- 5-15Code Development Tools 311
- 5.5 C–– Compiler 312
- 5.5.2 Variable Types 313
- 5.5.3 External References 313
- 5.5.4 C– – Directives 314
- 5.5.5 Include Files 315
- 5.5.7 Initializations 317
- 5.5.8 RAM Usage 317
- 5.5.9 String Functions 318
- Table 5–1. String Functions 318
- 5.5.10 Constant Functions 319
- 5.6 Implementation Details 320
- 5.6.2 Division 322
- 5.6.3 Function Calls 322
- 5.6.4 Programming Example 323
- Implementation Details 324
- 5-29Code Development Tools 325
- 5-31Code Development Tools 327
- 5-33Code Development Tools 329
- 5-35Code Development Tools 331
- 5.7 C–– Efficiency 333
- C–– Efficiency 334
- 5.7.1 Real Time Clock Example 335
- Example 5–1. First Project 335
- 5-47Code Development Tools 343
- 5-53Code Development Tools 349
- Beware of Stack Corruption 353
- 5-57Code Development Tools 353
- Applications 355
- 6.1 Application Circuits 356
- Oscillator 357
- 6.2.1 File init.asm 359
- 6.3 TI-TALKS Example Code 362
- 6.4 RAM Overlay 363
- 6.4.2 RAM Overlay 364
- 6.4.4 Common Problems 365
- Customer Information 367
- 7.1 Mechanical Information 368
- Mechanical Information 369
- 7-3Customer Information 369
- 7-5Customer Information 371
- 7-7Customer Information 373
- 7.3 Speech Development Cycle 378
- 7.5 Ordering Information 380
- Additional Information 389
- A.1 Additional Information 390
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